CMSC 411 Section 101 -- Fall 1994
CMSC 411 Section 101
Syllabus
- Information representation. Tags. Check bits.
- Number formats. Floating-point numbers. IEEE 754 standard.
- Instruction sets. Addressing modes. RISC vs. CISC.
- Fixed-point addition and subtraction. Unsigned and signed multiplication.
- Division. ALU design. Bit slicing.
- Floating-point arithmetic. Arithmetic processors.
- Instruction sequencing. Stack control.
- Hardwired control.
- Microprogrammed control. AMD 2909. Microinstruction types. Horizontal vs. vertical microcode.
- Microprogram optimization. Width optimization. Microcode compaction.
- Microprogrammed computers. Nanoprogramming. Nanodata QM1.
- Memory technologies. RAM design. Memory hierarchies.
- Performance evaluation. Hit ratio.
- Cache memories. VAX-11/780 cache. Associative memories and processors.
- Interleaved memories.
- Communication methods. Bus control and timing. Multibus (IEEE 796) bus.
- Input-output. Programmed I/O.
- Interrupts and DMA. I/O processors. Intel 8089.
- Processor classification. Performance measurement.
- Vector processors.
- Instruction and arithmetic pipelines.
- Multiprocessors. Shared vs. distributed memory.
- Interconnection networks.
- Hypercube computers.
Return to the main CMSC 411 page.