Project 1

Due October 17, 1994

Your first project will be to design a 16-bit carry-lookahead ALU for signed numbers. The ALU will support addition, subtraction, negation, AND, OR, and XOR. All of these operations should take place in a single cycle. The ALU will also be used to implement the algorithm for signed multiplication that we went over in class (two 16-bit numbers yielding a 32-bit result), though this will take several cycles. This ALU will be used in a RISC processor, so all arithmetic operations will be register-register, with the result also going back to a register. Since the multiplication result is 32 bits, the top half of the bits should go into RAM(B) and the other half into RAM(A). CPU instructions are 19 bits long and consist of the A,B,IS,IF,ID,Cin format from page 263 in the textbook and a single bit, M, that will start a multiplication. These bits need not be fed directly to the inputs of the 2901; you'll probably need some logic between the instruction and the input signals, especially to perform multiplication.

You should only use hardwired gates to control multiplication; don't use a sequence of microinstructions. You'll need a counter to figure out how many steps to run. The multiplication will be started when an instruction sets the M bit. The circuit should produce a DONE signal that is set when the multiplication is finished. You may use one or two instructions to set up the calculation and one or two more to "clean up" at the end. You may not use separate instructions for each cycle of the multiplier. If you do use extra "helper" instructions, be sure to list them along with the instruction that actually does the multiply.

The design may use basic logic gates (AND, OR, XOR, etc.) with up to 4 inputs, flip-flops, full adders, a 4-bit counter for the multiplication, and four 2901 chips. The counter takes three signals --- RESET (resets the counter to a value), DECREMENT (subtracts one from the counter), and CLOCK (makes the counter do whatever the RESET and DECREMENT lines indicate; it may be nothing if neither is asserted). The counter produces a single signal --- ZERO --- which is asserted when the count reaches zero. Assume that the 2901 bit-slice loads registers on a clock edge, and that the counter and 2901 chips use the same clock edge.

Try to be as neat as possible --- messy diagrams are the best way to insure that the real hardware built from the plans doesn't work. If you need to make any assumptions (for example, whether signals are active-high or active-low), please state them. If you'd like to ask me questions about the assignment (and you're welcome to do so), please stop by my office hours or send e-mail to elm@cs.umbc.edu.

The specific instructions your ALU must execute are:

store:     RAM(B)            -> Y
load:      D                 -> RAM(B)
add:       RAM(A) + RAM(B)   -> RAM(B)
subtract:  RAM(B) - RAM(A)   -> RAM(B)
negate:    -RAM(B)           -> RAM(B)
OR:        RAM(A) OR RAM(B)  -> RAM(B)
XOR:       RAM(A) XOR RAM(B) -> RAM(B)
AND:       RAM(A) AND RAM(B) -> RAM(B)
multiply:  RAM(A) * RAM(B)   -> RAM(B).RAM(A)

What you should hand in (due October 17, 1994):

1. Your ALU design (not someone else's, please!). This should include the logic, wiring, and any truth tables or state diagrams you had to design.

2. The bit encoding for each instruction.

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